Conferencia: 'Challenges and Opportunities of Cryo-CMOS for Quantum Computing'

Conferencia impartida por Alberto Gómez Saiz, que lidera el equipo de Diseño de Circuitos Integrados de Radiofrecuencia en Quantum Motion, empresa emergente en expansión (scale-up) británica que desarrolla ordenadores cuánticos basados en silicio.

Abstract

The challenge of scaling up quantum computers to reach the utility-scale has motivated the study of deep cryogenic (below 10K) electronics as a key enabling technology. CMOS technology, the workhorse of modern integrated circuits, also offers excellent performance in this temperature regime. In the first part of this presentation, we discuss the parameter changes in advanced node MOSFETs at deep-cryogenic temperatures and describe the non-ideal behaviours that designers should be aware of. As quantum effects manifest strongly at ~4K, it becomes possible to realize fundamentally novel devices. In the second part of this presentation, we introduce quantum-based devices realized in CMOS technology such as superconducting switches, superconducting inductors and quantum dot varactors. We then present a methodology for modelling these devices and discuss how to leverage them to push the performance of analog circuits. In the third and final part of the presentation, we present a practical example of the requirements of the electronic interface necessary to operate a quantum computer. We discuss in detail the case of a Silicon Spin quantum computer. We present a scalable multi-module architecture, in which all the integrated circuits components have been fabricated in 22-nm FDSOI technology. We report the cryogenic measurement results of several key ICs of the architecture: a 0-2GHz SP8T switch, a 0.7GHz LNA with a 4.2K noise temperature, and a 6-12 GHz Hartley IQ up-modulator. Overall, the presented results highlight the potential of cryo-CMOS as a key enabler to realize large-scale quantum computers.

Gómez Saiz posee un Máster en Diseño de Circuitos Integrados por el Imperial College de Londres (2013) y un Máster en Tecnologías Cuánticas por la University College de Londres (2022). Desde 2024, cursa un doctorado industrial en el Imperial College de Londres y Quantum Motion, con una beca (industrial fellowship) de la Comisión Real de la Exposición de 1851. Cuenta con más de 12 años de experiencia industrial en el campo del diseño de circuitos integrados de radiofrecuencia (RF), habiendo participado en los desarrollos tanto del primer sistema en chip (SoC) comercial NFC+Bluetooth en CSR como del primer SoC comercial de NB-IoT en Huawei. Sus intereses de investigación se centran en el diseño de circuitos crio-CMOS para el control de procesadores cuánticos y la exploración de circuitos integrados de RF híbridos cuántico-clásicos.

Área de descarga